1 m e m o r y all data sheets are subject to change without notice (858) 503-3300 - fax: (858) 503-3301 - www.maxwell.com 14-bit a/d converter 7872 ?2001 maxwell technologies all rights reserved. 5.21.02 rev 4 f eatures : ? 14-bit resolution and accuracy total dose hardness: - > 100 krad (si), depending upon space mission single event effects: - sel > 104 mev/mg/cm 2 - seu th = 1.4 mev/mg/cm 2 - seu sat = 1e-3 cm 2 /device package: - 16 pin r ad -p ak ? flat package - 16 pin r ad -p ak ? dual-in-line package fast conversion times: 10 s low 50 mw typical power consumption high speed lc 2 mos technology - analog input range of 3v - 83 ksps throughput rate - operates with +5v/-5v power supplies - 80 db snr at 10 khz input frequency - 2 s complement coding - serial output d escription : maxwell technologies? 7872 high-speed 14-bit adc microcir- cuit features a greater than 100 krad (si) total dose tolerance; depending upon orbit. the 7872 consists of a track/hold ampli- fier, successive-approximation adc, 3v buried zener refer- ence and versatile interface logic. it features a self-contained, laser- trimmed internal clock, so no external clock timing com- ponents are required. for mini mum noise possible, the on- chip clock may be overridden to synchronize the device oper- ation to the digital system. the 7872 is a serial output device. it is capable of interfacing to all modern microprocessors and digital signal processors. the 7872 operates from 5v power supplies, accepts bipolar input signals of 3v and is able to convert full power signals up to 41.5 khz. it is also fully speci- fied for dynamic performance parameters including distortion and signal-to-noise ratio. maxwell technologies' patented r ad -p ak ? packaging technol- ogy incorporates radiation shielding in the microcircuit pack- age. it eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. in a geo orbit, r ad -p ak provides greater than 100 krad (si) radiation dose tolerance. this product is available with screening up to class s. 3v reference clock control logic 14-bit dac serial interface 12 11 13 14 9 16 3 1 2 4 5 6 sar + counter 8 15 r r track/hold comp agnd c ref ref out v in v dd v dd clk control convst sstrb sclk sdata dgnd v ss logic diagram
m e m o r y 2 all data sheets are subject to change without notice ?2001 maxwell technologies all rights reserved. 14-bit a/d converter 7872 5.21.02 rev 4 t able 1. 7872 p in d escription p in s ignal d escription 1 control control function 2convst convert start 3 clk clock input 4sstrb serial strobe 5 sclk serial clock 6 sdata serial data 7 nc non connect 8 dgnd digital ground 9v dd positive supply 10 nc no connect 11 c ref reference capacitor 12 agnd analog ground 13 ref out voltage reference output 14 v in analog input 15 v ss negative supply 16 v dd positive supply t able 2. 7872 a bsolute m aximum r atings p arameter s ymbol m in m ax u nit positive supply voltage; relative to gnd v dd -0.3 7.0 v negative supply voltage; relative to gnd v ss 0.3 7.0 v agnd to dgnd; relative to gnd -- -0.3 v dd +0.3 v ref out , c ref to agnd -- 0 v dd v v in to agnd -- v ss -0.3 v dd +0.3 v digital input voltage v in -0.3 v dd +0.3 v digital output voltage v out -0.3 v dd +0.3 v thermal impedance jc -- 2.44 c/w storage temperature range t s -65 150 c operating temperature range t a -55 125 c
m e m o r y 3 all data sheets are subject to change without notice ?2001 maxwell technologies all rights reserved. 14-bit a/d converter 7872 5.21.02 rev 4 t able 3. 7872 dc e lectrical c haracteristics for d ynamic p erformance 1 (v dd = 5 v 5%, v ss = -5 v 5%, agnd = dgnd = 0 v, f clk = 2 mh z external , f sample = 83 k h z , -55 to 125 c unless otherwise specified ) 1. v in = 3 v. guaranteed by design. p arameter s ymbol s ubgroups m in t yp m ax u nit signal to noise ratio v in = 10khz sine wave, t min to t max ; snr is typically 82db for v in < 41.5khz 2 2. snr calculation includes distortion and noise components. snr 4, 5, 6 79 -- -- db total harmonic distortion v in = 10khz sine wave thd 4, 5, 6 -- -86 -- db peak harmonic or spurious noise -- 4, 5, 6 -- -86 -- db intermodulation distortion second order terms: f a = 9 khz, f b = 9.5 khz, f sample = 50 khz third order terms: f a = 9 khz, f b = 9.5 khz, f sample = 50 khz imd 4, 5, 6 -- -- -86 -86 -- -- db track/hold acquisition time -- 4, 5, 6 -- -- 2 s t able 4. 7872 dc e lectrical c haracteristics for a ccuracy (v dd = 5v 5%, v ss = -5 v 5%, t a = -55 to 125 c unless otherwise specified ) p arameter s ymbol s ugroups m in t yp m ax u nit resolution -- 1, 2, 3 14 -- -- bits resolution for which no missing codes are guaran- teed -- 1, 2, 3 14 -- -- bits integral nonlinearity @ 25 c -- 1, 2, 3 -- 1 -- lsb integral nonlinearity t min to t max -- 1, 2, 3 -- -- 2 lsb bipolar zero error -- 1, 2, 3 -- -- 12 lsb positive gain error 1 1. measured with respect to internal reference. -- 1, 2, 3 -- -- 12 lsb negative gain error 1 -- 1, 2, 3 -- -- 12 lsb t able 5. 7872 dc e lectrical c haracteristics for a nalog i nput (v dd = 5v 5%, v ss = -5 v 5%, t a = -55 to 125 c unless otherwise specified ) p arameter s ymbol s ubgroups m in m ax u nits input voltage range -- 1, 2, 3 -3 3 v input current -- 1, 2, 3 -500 500 a
m e m o r y 4 all data sheets are subject to change without notice ?2001 maxwell technologies all rights reserved. 14-bit a/d converter 7872 5.21.02 rev 4 t able 6. 7872 dc e lectrical c haracteristics for r eference o utput (v dd = 5v 5%, v ss = -5 v 5%, t a = -55 to 125 c unless otherwise specified ) p arameter s ymbol s uggroups m in m ax u nit ref out @ +25 c -- 1, 2, 3 2.99 3.01 v ref out t min to t max -- 1, 2, 3 2.98 3.02 v ref out tempco: typically 35ppm -- 1, 2, 3 -- 40 ppm/ o c reference load sensitivity (dref out /di) reference load current change (0-300 a); reference load should not be changed dur- ing conversion -- 1, 2, 3 -- 1.2 mv t able 7. 7872 dc e lectrical c haracteristics for l ogic i nputs (v dd = 5v 5%, v ss = -5 v 5%, t a = -55 to 125 c unless otherwise specified ) p arameter s ymbol s uggroups m in m ax u nit input high voltage: v dd 5 v 5% v inh 1, 2, 3 2.4 -- v input low voltage: v dd 5 v 5% v inl 1, 2, 3 -- 0.8 v input current: v in = 0 v to v dd i in 1, 2, 3 -10 10 a input current: (14/8/clk input only) vin = vss to vdd -- 1, 2, 3 -10 10 a input capacitance 1 1. not tested. c in 1, 2, 3 -- 10 pf t able 8. 7872 dc e lectrical c haracteristics for l ogic o utputs (v dd = 5v 5%, v ss = -5 v 5%, t a = -55 to 125 c unless otherwise specified ) p arameter s ymbol s ubgroups m in m ax u nit output high voltage i source = 40 a v oh 1, 2, 3 4.0 -- v output low voltage i sink = 1.6 ma v ol 1, 2, 3 -- 0.4 v floating-state leakage current -- 1, 2, 3 -- 10 a floating-state output capacitance 1 1. not tested. -- 1, 2, 3 -- 15 pf t able 9. 7872 dc e lectrical c haracteristics for c onversion t ime (v dd = 5v 5%, v ss = -5 v 5%, t a = -55 to 125 c unless otherwise specified ) p arameter s ymbol s ubgroups m in m ax u nit external clock -- 1, 2, 3 -- 10 s internal clock: nominal value = 2 mhz -- 1, 2, 3 -- 11 s
m e m o r y 5 all data sheets are subject to change without notice ?2001 maxwell technologies all rights reserved. 14-bit a/d converter 7872 5.21.02 rev 4 t able 10. 7872 dc e lectrical c haracteristics for p ower r equirements (v dd = 5v 5%, v ss = -5 v 5%, t a = -55 to 125 c unless otherwise specified ) p arameter s ymbol c onditions r equirements u nits positive supply voltage v dd 5% for specified performance 5 v negative supply voltage v ss 5% for specified performance -5 v positive supply current i dd typically 6ma 13 ma max negative supply current i ss typically 4ma 6 ma max power dissipation p d typically 50mw 95 mw max t able 11. 7872 t iming c haracteristics 1,2 (v dd = 5v 5%, v ss = -5 v 5%, t a = -55 to 125 c unless otherwise specified ) 1. all input signals are specified with tr = tr = 5 ns (10% to 90% of 5 v) and timed from a voltage level of 1.6 v. 2. serial timing is measured with a 4.7 k ? pull-up resistor on sdata and sstrb and a 2 k ? pull-up resistor on sclk. the capacitance on all three outputs is 35 pf. p arameter /c ondition s ymbol s ubgroups m in m ax u nits convst pulse width t 1 9, 10, 11 50 -- ns sstrb to sclk falling edge setup time t 10 9, 10, 11 100 -- ns sclk cycle time 3 3. sclk mark/space ration (measured from a voltage level of 1.6 v) is 40/60 to 60/40. t 11 9, 10, 11 440 -- ns sclk to valid data delay: c l = 35 pf 4 4. sdata will drive higher capacitive loads, but this will add to t 12 since it increases the external rc time constant (4.7k ? /c l ) and hence, the time to reach 2.4 v. t 12 9, 10, 11 -- 155 ns scld rising edge to sstrb t 13 9, 10, 11 20 150 ns bus relinquish time after sclk t 14 9, 10, 11 4 100 ns
m e m o r y 6 all data sheets are subject to change without notice ?2001 maxwell technologies all rights reserved. 14-bit a/d converter 7872 5.21.02 rev 4 f igure 1. m ode 1 t iming d iagram s erial 1. external 4.7 k ? pull-up resistor. 2. external 2 k ? pull-up resistor continuos sclk (dashed line) w hen 14/8/clk (control) = -5 v; noncontinuous when 14/ 8/clk (control) = 0 v. f igure 2. m ode 2 t iming d iagram , s erial r ead 1. times t15, t18, t19 and t20 are the same for a high byte read as for a low byte read. 2. external 4.7 k ? pull-up resistor. 3. continuos sclk (dashed line) when 14/8/clk (control ) = -5 v; noncontinuous when 14/8/clk (control) = 0 v. external 2 k ? pull-up resistor. track hold goes into hold leading zeros db13 db12 db11 db10 db0 t 11 t 10 t 13 t 14 t 12 sclk 2 sdata t 1 convst sstrb 1 hben 1 sstrb 2 sclk 3 sdata 2 t 11 t 10 t 13 t 12 t 14
m e m o r y 7 all data sheets are subject to change without notice ?2001 maxwell technologies all rights reserved. 14-bit a/d converter 7872 5.21.02 rev 4 f igure 3. l oad c ircuit for a ccess t ime f igure 4. l oad c ircuit for o utput f loat d elay c l 50pf to output pin i oh 200ua 1.6ma i ol +2.1v c l 50pf to output pin i oh 200ua i ol 1.6ma +2.1v
m e m o r y 8 all data sheets are subject to change without notice ?2001 maxwell technologies all rights reserved. 14-bit a/d converter 7872 5.21.02 rev 4 f16-01 note: all dimensions in inches 16 p in r ad -p ak ? f lat p ackage s ymbol d imension m in n om m ax a 0.116 0.130 0.143 b 0.015 0.017 0.022 c 0.004 0.005 0.009 d -- 0.415 0.440 e 0.245 0.280 0.285 e1 -- -- 0.315 e2 0.130 0.156 -- e3 0.030 0.062 -- e 0.050 bsc l 0.325 0.335 0.345 q 0.020 0.033 0.045 s1 0.005 0.024 -- n16
m e m o r y 9 all data sheets are subject to change without notice ?2001 maxwell technologies all rights reserved. 14-bit a/d converter 7872 5.21.02 rev 4 d16-01 note: all dimensions in inches 16 p in r ad -p ak ? d ual i n l ine p ackage s ymbol d imension m in n om m ax a -- 0.157 0.200 b 0.014 0.018 0.026 b2 0.045 0.047 0.065 c 0.008 0.010 0.018 d -- 0.800 0.840 e 0.220 0.295 0.310 ea 0.300 bsc ea/2 0.150 bsc e 0.100 bsc l 0.135 0.145 0.155 q 0.000 0.002 0.060 s1 0.005 0.027 -- s2 0.005 -- -- n16 ea/2 e d a s2 q c l ea e b b2 s1 n/2
m e m o r y 10 all data sheets are subject to change without notice ?2001 maxwell technologies all rights reserved. 14-bit a/d converter 7872 5.21.02 rev 4 important notice: these data sheets are created using the chip manufacturer?s published specifications. maxwell technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. the specifications presented within these data sheets represent the latest and most accurate information available to date. however, these specifications are subject to change without notice and maxwell technologies assumes no responsibility for the use of this information. maxwell technologies? products are not authorized for use as critical components in life support devices or systems without express written approval from maxwell technologies. any claim against maxwell technologies must be made within 90 days from the date of shipment from maxwell tech- nologies. maxwell technologies? liability shall be limited to replacement of defective parts.
|
